The numbers we actually run to.
Three capability sets, each with the ranges we hold in production — not a one-off best case. If your design sits at the edge of a range, say so when you upload; we will tell you before tooling, not after the first lot.
Pick the process. Read the numbers.
Same factory floor, three different process windows. Switch between them — the menu links below jump straight to the set you need.
| Parameter | What we hold in production |
|---|---|
| Layer count | 1 – 108 |
| Laminate brands | SY · ITEQ · KB · NanYa · Doosan · Isola · TUC · EMC · Ventec |
| Board thickness | 0.13 – 8.0 mm |
| Max board size, 2-layer | 2000 × 650 mm |
| Max board size, 4 – 6 layer | 570 × 850 mm |
| Min mechanical drill | 0.15 mm |
| Min laser drill | 0.075 mm |
| Min trace / space | 0.075 / 0.075 mm |
| Pattern width tolerance | ±20 µm |
| Min pad | 0.15 mm |
| Outline tolerance | ±0.05 mm laser routing · ±0.10 mm mechanical routing |
| Copper weight | 1 – 10 oz |
| Surface finish | HASL (lead-free) · ENIG · OSP · immersion tin / silver · hard gold · ENEPIG |
| Solder mask colour | Green · black · matte black · blue · red · white · yellow |
Edge cases are reviewed, not refused. Tell us the target at upload stage and the answer comes from process engineering, not from sales.
Multilayer PCB| Parameter | What we hold in production |
|---|---|
| Laminates | Rogers RO3000 / RO4000 / RT5000 / RT6000 · Arlon · Taconic · Wanglin PTFE |
| Hybrid stackups | PTFE or Rogers + FR-4, 4 – 70 layers |
| Layer count | 1 – 70 |
| Dk range | 1 – 25 |
| Copper weight, finished | 0.5 – 12 oz |
| Min core thickness | 4 mil (0.10 mm) |
| Min trace / space | 0.076 mm |
| Pattern width tolerance | ±20 µm |
| Laminate thickness tolerance | ±0.05 mm |
| Board thickness tolerance | ±0.10 mm (≤ 1.0 mm) · ±10% (> 1.0 mm) |
| Impedance tolerance | ±5%, TDR verified on every lot |
| Max board size | 590 × 440 mm (2-layer) · 580 × 420 mm (multilayer) |
| PTFE array | 16 × 18 at 0.50 mm thickness |
| Surface finish | ENIG · ENEPIG · immersion silver · OSP · hard gold |
Edge cases are reviewed, not refused. Tell us the target at upload stage and the answer comes from process engineering, not from sales.
High-Frequency PCB| Parameter | What we hold in production |
|---|---|
| HDI construction | 1+N+1 → 6+N+6 · anylayer |
| Layer count | 1 – 40 (HDI) · 1 – 16 (IC substrate) |
| Min trace / space | 2 / 2 mil (0.05 mm) · IC substrate 25 / 25 µm |
| Min laser via | 0.075 – 0.100 mm |
| Min mechanical hole | 0.15 mm |
| Min core / PP thickness | 2 mil / 2 mil |
| Through-hole aspect ratio | 16 : 1 |
| Blind via aspect ratio | 1.2 : 1 |
| BGA pad / pitch | 0.20 mm pad · 0.30 mm pitch · IC substrate 250 µm |
| Resin plug | up to 0.40 mm · plating fill 3 – 5 mil · dimple ≤ 10 µm |
| Interlaminar registration | ±0.05 mm |
| IC substrate pad | 80 µm · mSAP + subtractive |
| Surface finish | ENEPIG · ENIG · OSP · soft gold · hard gold |
| Flatness (IC substrate) | ≤ 5 µm |
Edge cases are reviewed, not refused. Tell us the target at upload stage and the answer comes from process engineering, not from sales.
HDI & IC SubstrateNot sure which set applies?
Upload the file and say what the board is for. We will tell you which process window it lands in, and where the risk is.